Samsung Electronics Expands P5 Factory Plans in Pyeongtaek

Samsung Electronics is advancing its plans to expand the P5 1·2 factory in Pyeongtaek, Gyeonggi Province, transforming it from a dual-layer wafer facility to a three-layer wafer plant. This expansion aims to enhance production capacity in response to the growing demand for artificial intelligence semiconductors and memory products. The company has submitted a proposal to increase the floor area ratio from 350% to a maximum of 490%, which requires approval from the Gyeonggi Province governor and the Ministry of Land, Infrastructure and Transport's industrial site policy review committee.

The Pyeongtaek P5 1·2 factory, which is currently under construction and expected to be completed by 2030, is the largest semiconductor factory globally under a single standard. It will manufacture high bandwidth memory (HBM), high-end DRAM, next-generation V-NAND, and advanced foundry products. If the proposed changes are approved, the factory will feature up to six clean rooms, significantly increasing its production capacity by approximately 1.5 times compared to the existing P4 facility, which operates with a dual-layer structure.

Market analysts predict a substantial growth in the global memory market, estimating it will rise from around 360 trillion won last year to 1,500 trillion won this year and reach 2,100 trillion won next year. In light of challenges such as limited access to electricity, water, and land, the proposed increase in floor area ratio is seen as a crucial strategy to maximize the use of existing semiconductor industry resources. SK Hynix is also planning to adopt a three-layer structure for its new wafer factories in the Yongin semiconductor cluster.

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Source: KLEA News